OPENEDGES develops AI Edge Computing semiconductor IPs,
so that more people can enjoy AI technology closer.
📍 Location: San Jose, CA, USA or Austin, TX, USA
📍 Position: Junior Performance Modeling Engineer
OPENEDGES is world's the only total memory system and AI platform IP solution company that has delivered NPU, memory controllers, DDR PHY, and on-chip interconnect IPs all together in one place since 2017.
Roles & Responsibilities:
OPENEDGES is currently seeking to build a team in the US with the goal of developing a configurable, cache-coherent Network-on-Chip (NOC) to add to its portfolio, enabling high-performance and highly efficient AI designs that require cache coherency. This is an exciting opportunity to work on a design from scratch that can significantly impact the field of AI. This role is based in San Jose, CA, or Austin, TX, with the possibility of hybrid/remote work.
As a Junior Performance Modeling Engineer, you will play a critical role in architecting the performance model for the cache-coherent interconnect NOC. This will involve collaborating with cross-functional teams to explore architectural and micro-architectural options, evaluate design alternatives and estimate performance. You will be part of the team that develops highly configurable and reliable performance models and its infrastructure that supports customers to arrive at an architecture configuration that suits their needs.
Your primary responsibilities will include:
Collaborating with cross-functional teams to develop performance models that drive the evaluation of new features and evolve into well-correlated models with our IP RTL designs
Modeling complex configurable designs and conducting performance analysis to inform architectural decisions
Conducting performance simulations and measuring alternative designs
Work with IP RTL and Verification team to conduct performance correlation and debug of the model with RTL for the different architectural configurations
Job Requirements:
We are looking for a highly motivated individual with the following qualifications:
BS+ 3 years, MS+ 2 years or PhD in Computer Engineering, Electrical Engineering, or a related field
Strong passion and aptitude for computer architecture, microarchitecture, performance modeling and networking
A track record of success in modeling, analyzing, and debugging sophisticated IP designs.
Experience in performance modeling, simulation, analysis, and RTL correlation of SoC system performance, with a proven ability to provide effective solutions.
Expertise in C++ with a strong background in software architecture and design patterns, applied to various areas in performance modeling and tooling.
Strong analytical skills and ability to work through ambiguities
Preference:
The ability to work in an entrepreneurial environment that fosters a collaborative and team-oriented atmosphere
A self-starting orientation with a strong drive to make things happen
Expertise in SystemC and TLM
Expertise in Python
Experience in bringing up performance models for Network on a Chip (NoC) is a definite plus.
Benefits:
Medical Plan
Dental & Vision Benefits
Life & Accidental Death & Dismemberment (AD&D) Insurance
401K
Location:
2540 N.First Street, Suite 101, San Jose, CA, US (On-site/Hybrid/Remote)
Austin, TX (office coming soon)
How to Submit Your Resume:
Click Apply to submit your application online